The present invention relates to high voltage integrated circuit semiconductor devices, and more particularly to such devices that are electrically isolated from an integrated circuit substrate as well as from each other.
The above-referenced Wildi and Adler application discloses and claims an integrated circuit including a high voltage semiconductor device fabricated in a high resistivity epitaxial layer atop a high resistivity substrate of the integrated circuit, the epitaxial layer having a conductivity type opposite to that of the substrate. The high voltage device includes a first main device region of the same conductivity type as the epitaxial layer and a second main device region of the same conductivity type as the substrate, these regions being spaced apart by a portion of the epitaxial layer capable of supporting high voltage. The high voltage device is electrically isolated from other devices in the integrated circuit by an isolation region surrounding the high voltage device and adjoining the substrate. The high voltage device is electrically isolated also from the substrate through the interposition of a high conductivity buried layer of the same conductivity type as the epitaxial layer between the second main device region (of the same conductivity type as the substrate) and the substrate. The high conductivity buried layer prevents current carrier injection from the second main device region into the substrate.
Forward current conduction of the Wildi and Adler high voltage device when both the first and second main device regions are at high voltage is precluded, however, due to the inclusion in the device of a further region of the same conductivity type as the substrate, the purpose of which is to prevent the buried layer from rising dangerously high in voltage when the high voltage device is in a reverse blocking mode.
The further region of the Wildi and Adler device adjoins the epitaxial layer, so as to form a P-N junction therewith, is situated between the buried layer and the first main device region, and is electrically shorted to the substrate. In the device reverse blocking mode, current carriers from the buried layer are attracted via the epitaxial layer to the first main device region, which, in this mode, is at high voltage relative to the second main device region. Unrestrained current carrier flow from the buried layer to the first main device region would result in the buried layer voltage rising to nearly that of the first main device region, resulting in avalanche breakdown between the second main device region and the buried layer. The inclusion of the further region, however, causes pinch off of the unwanted current carrier flow in the epitaxial layer, this occurring as a result of the aforementioned P-N junction becoming highly reversed biased and inducing a depletion region in the epitaxial layer. This pinch off phenomenon is responsible, however, for preventing device forward current conduction with the second main device region also being at high voltage, since the pinch off phenomenon continues in this situation.
To avoid the foregoing pinch off phenomenon in the Wildi and Adler device when both main device regions are at high voltage, the further region may be electrically shorted to the second main device region rather than to the insulation region. This, however, would result in the further region injecting current carriers into the substrate and thereby impairing device forward conduction, since the further region would be at high voltage, rather than at ground.
It would be desirable to provide a high voltage semiconductor device of the same type as the foregoing Wildi and Adler device that is capable of unimpaired forward conduction with both main device regions at high voltage.
Accordingly, an object of the present invention is to provide a high voltage integrated circuit semiconductor device that is electrically isolated from the integrated circuit substrate while being capable of forward conduction at high voltage.
A further object of the invention is to provide a high voltage semiconductor device that may be incorporated into an integrated circuit using conventional semiconductor fabrication technology.
Briefly, in accordance with a preferred realization of the present invention, a semiconductor device is incorporated in an integrated circuit of the type including a substrate layer of one conductivity type, a drift layer of opposite conductivity type overlying the substrate layer, and an isolation region of substrate conductivity type surrounding the draft layer and adjoining the substrate layer.
The semiconductor device includes a first main device region of the opposite conductivity type extending into an upper portion of the drift layer and a second main device region of the substrate conductivity type extending into an upper portion of the drift layer and configured as a loop surrounding the first main device region at the upper surface of the drift layer. A portion of the drift region between the first and second main terminal regions supports voltage between these regions in a device reverse blocking mode. A buried layer of the opposite conductivity type is situated between the substrate and drift layers and beneath the second main device region and is configured as a loop surrounding the first main device region. That is, the projection of the buried layer on the upper surface of the drift layer surrounds the first main device region. A field gate electrode is insulatingly spaced from the drift region, is situated between the buried layer and the first main terminal region, is configured as a loop surrounding the first main terminal region, and is electrically shorted to the second main terminal region.
With the semiconductor device in a reverse blocking mode such that the first main device region is at high voltage relative to the second main device region, the field gate pinches off current carrier flow in the drift layer originating from the buried layer and attracted to the first main terminal region (at high voltage), preventing the buried layer from rising to an undesirably high voltage at which avalanche breakdown occurs between the buried layer and the second main device region.
By way of example, the semiconductor device of the invention may be of the type wherein the first and second main device regions comprise cathode and anode regions of a P-N diode, respectively; collector and base regions of a bipolar transistor, respectively; or drain and source regions of an insulated-gate field-effect transistor, respectively.